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Kintex-7 FPGAs Data Sheet: DC and AC Switching Characteristics
Table 54: GTX Transceiver Performance (Cont’d)
Speed Grade
1.0V
0.9V
Symbol
Description
Output
Divider
-3
-2/-2L -1/-1M (1)
Package Type
-2L (2)
Units
FF
FB
FF
RF
FB
FF
RF
FB
FF
RF
FB
F GQPLLRANGE2 GTX transceiver QPLL frequency
range 2
9.8–12.5
9.8–10.3125
N/A
N/A
GHz
Notes:
1.
2.
3.
4.
The -1 speed grade requires a 4-byte internal data width for operation above 5.0 Gb/s.
The -2L (0.9V) speed grade requires a 4-byte internal data width for operation above 3.8 Gb/s.
Data rates between 8.0 Gb/s and 9.8 Gb/s are not available.
For QPLL line rate range 2, the maximum line rate with the divider N set to 66 is 10.3125Gb/s.
Table 55: GTX Transceiver Dynamic Reconfiguration Port (DRP) Switching Characteristics
Speed Grade
Symbol
Description
-3
1.0V
-2/-2L
-1/-1M
0.9V
-2L
Units
F GTXDRPCLK
GTXDRPCLK maximum frequency
175.01
175.01
156.25
125.00
MHz
Table 56: GTX Transceiver Reference Clock Switching Characteristics
Symbol
Description
Conditions
Min
All Speed Grades
Typ Max
Units
F GCLK
T RCLK
T FCLK
T DCREF
Reference clock frequency range
Reference clock rise time
Reference clock fall time
Reference clock duty cycle
-3 speed grade
All other speed grades
20% – 80%
80% – 20%
Transceiver PLL only
60
60
–
–
40
–
–
200
200
50
700
670
–
–
60
MHz
MHz
ps
ps
%
X-Ref Target - Figure 3
T RCLK
8 0 %
20 %
T FCLK
d s 1 8 2_0 3 _042712
Figure 3: Reference Clock Timing Parameters
DS182 (v2.8) March 4, 2014
Product Specification
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